COMMENT ⊗   VALID 00004 PAGES
C REC  PAGE   DESCRIPTION
C00001 00001
C00002 00002		ARM-COMPUTER INTERFACE FOR PDP-11
C00005 00003			BIT ASSIGNMENTS - USING DR-11C
C00013 00004	A/D CHANNEL ASSIGNMENTS
C00015 ENDMK
C⊗;
	ARM-COMPUTER INTERFACE FOR PDP-11

INTRODUCTION

	This description is for the new interface for the yellow
arm.  It is only temperary, but you know how that goes.  It is
intended to be used with a DEC DR-11C general device interface card
plugged into the 11/45's unibus.

The interface contains a 12 bit A/D (+-10vdc), 32 channels of
multiplexing, and a buffer amplifier for reading analog signals.

There are also 7 12-bit DACs (+-10vdc output) for outputting analog
signals to drive current to the arm's motors.

The interface can read binary (TTL levels) from the arm- Touch
bits plus Panic.  

The interface can output 7 binary bits (brake bits) to the arm. This
can be expanded to about 16.

Interrupts can be obtained on the OR of Touch and Panic Bits.

Power requirements are +-15vdc, and +5vdc.

Power enters the board by the DEC edge pins.  The following pins
are assigned for this purpose 
	GND- CC2, DC2, EC2, FC2, CT1, DT1, ET1, FT1
	+5-  CA2, DA2, EA2, FA2
	+15- DH1, FH1
	-15- DE1, FE1


All other edge pins are avaliable for backplane signals, etc.
		BIT ASSIGNMENTS - USING DR-11C

The DEC DR-11C has three registers- A Status Register, An Output Data
Register,  and An  Input  Data Register.   These  registers  have the
following addresses:        

For the arm interface
167770 -Status
167772 -Output  (Load Functions)
167774 -Input   (Read Functions)

Register addresses can  be changed in  steps of 10(octal)  from these
base addresses, by altering jumpers on the DEC board.

The interface  is designed to  use this DEC type  of interface card.

Two 40 conductor cables connect the Interface to the DEC card.

The interface operates in  various modes, all  under computer
control.   This is done by setting the proper  CSR bits in the Status
Register.

A list of CSR Bits and Function Follows.

FUNCTION		CSR1	CSR0 		       	REGISTER
                                     	15	12	9	6	3	0
					-----------------------------------------
Load DACs        	0	0      |3bit addr|unu.| 12bits DAC data		 |
					-----------------------------------------
					-----------------------------------------
Load Brakes		0	1      |DAC|  3  | en touch |  4  |   7 bits     |
				       |enb|spare|int(bit11)|spare|  brake 6-0   |
					-----------------------------------------
					-----------------------------------------
Load A/D channel no.	1 	0      |        11 bits spare     |5bits A/D chn |
					-----------------------------------------
					-----------------------------------------
Read a/d		1 	0      |4 bits spare|   12 bits A/D data 	 |
					-----------------------------------------
					-----------------------------------------
Read Sensors and Bits	1	1      |   8 bits |1 bit PANIC|5 bits|  2 bits   |
				       |   spare  | (bit 07)  | spare|  touch    |
					----------------------------------------- 



All output (load) functions take place when the NEW DATA READY signal
comes up  indicating the output buffer register  has been loaded with
the output data.  This happens whenever the Output Register is written
into from the unibus.  
The OUTPUT REGISTER contents are listed above.

When the INPUT REGISTER is read by the processor, the data selected is
controlled by the CSR bits as shown above.

The usual mode of operation is as follows.  To read an A/D channel, the
A/D channel is written.  This will clear REQ A, select the appropriate
A/D channel, initiate the conversion, and interrupt via REQ A, if the DR11-C
interrupt enable is set.  Reading the INPUT REGISTER when selected to
the A/D will clear REQ A.

If the enb touch int bit in the interface is set, the 
enable interrupt B bit in the DR11-C, and any of the touch or panic bits
are activated, an interrupt will occur on channel B.  Reading the sensor
register will clear REQ B.

The INPUT REGISTER contents are listed above.  (For arm,
Interrupt A address is 310, and Interrupt B address is 314).

Some definitions are:

Control bits
ENB TOUCH INT.-Enables the touch sensor and PANIC 
interrupt (REQ B).

DAC ENB- This bit must be set or all DAC registers are held at 0 and
	no motors will be driven.  This bit is cleared if the safety
	timer times out or panic occurs.

Brake bits-  This bit releases brake on joint and enables joint servo
	(1 per joint).  When this bit is set, the DAC register for
	that joint is held clear (no drive).  These bits are cleared
	if the safety time times out or panic occurs.

		
Sensor Bits- These bits  come up when touch sensors,  or other binary
	devices switch.

STOP or PANIC BIT- Set by pushing STOP button on hand unit- stops arm
	immediately.

Safety Features

PANIC BIT is set if the panic button is pushed or any brake release
	switch is activated.  The result is that the brake register
	is cleared (brake release switch overides on that joint),
	the DAC ENB bit is cleared, and all DAC registers are cleared
	(no motor drive).

Safety timer is a retriggerable one-shot set for about 70 milliseconds.
	It is set every time an operation is done to the Output Register.
	If it is not set again before the 70 milliseconds runs out,
	the timer times out and has the same effect as PANIC as described
	above.

Pulling the yellow cord around the preimiter of the table will dump
	power to all the motors in case of an emergency.  It will not
	remove power from the brakes or cause a PANIC situation.  It is
	intended as an emergency feature only.  If the electronics is
	working properly, the PANIC button will work to stop the arm
	immediatly in case of a wild program or the like.
A/D CHANNEL ASSIGNMENTS

0	JOINT 1 POT
1	JOINT 2 POT
2	JOINT 3 POT
3	JOINT 4 POT
4	JOINT 5 POT
5	JOINT 6 POT A
6	JOINT 6 POT B
7	HAND POT
8	JOINT 1 TACH
9	JOINT 2 TACH
10	JOINT 3 TACH
11	+REF/2	SHOULD BE CLOSE TO +5 VOLTS (1024.)
12	-REF/2	SHOULD BE CLOSE TO -5 VOLTS (3072.)
13
 .
 .	UNASSIGNED
 .
29
30	+30V/6	SHOULD BE ABOUT +5 VOLTS WHEN BRAKE POWER IS ON
31	-30V/6	SHOULD BE ABOUT -5 VOLTS WHEN MOTOR POWER IS ON

If channels 11 and 12 are not very close to the values above (or at
least very close to the values when the arm is calibrated) the
calibration of the pots will be incorrect.  If a substansial change
is detected, the arm will have to be recalibrated, or a fudge factor
will have to be used to get good pot readings.  If a reading near
0V (2048.) is obtained, something is broken and needs to be fixed.

If channel 30 (brake power) indicates little or no voltage, either
the power switch is in the logic only position, or the fuse for
the brakes is blown.

If channel 31 (motor power) indicates little or no voltage, either
the power switch is in the logic only position (see above), the
yellow safety cord has been pulled and needs to be reset, or
something catastrophic has happened to the moby supply.