COMMENT ⊗   VALID 00006 PAGES
C REC  PAGE   DESCRIPTION
C00001 00001
C00002 00002				PANOFSKY MAP vs. KT11C
C00003 00003	BASIC MECHANISIMS
C00005 00004	MAPPING TABLE DIFFERENCES
C00008 00005	ACCESS CODES AND STATISTICS MECHANISMS
C00010 00006	STATUS REGISTERS
C00012 ENDMK
C⊗;
			PANOFSKY MAP vs. KT11C

					Ted Panofsky

	This document describes the major differences between the "Panofsky
Map" and the Digital Equipment Corp. KT11C Memory Management unit for the
PDP11/45 computer.  Precise programming information for the Panofsky Map may
be found in the document "Panofsky Map for PDP11/45 Maintenance Manual" located
on the disk as MAP.POX[MAP,TED].  Programming for the KT11-C is described in
the document "KT11-C Memory Management Unit Maintenance Manual" published
by Digital Equipment Corporation.
BASIC MECHANISIMS

	The PDP11/45 address space is divided into six separate pieces that
can each have a different address map.  The pieces are defined as a separate
space for each processor mode, KERNAL, SUPERVISOR, and USER, and each mode
has a sub-division into INSTRUCTION and DATA spaces.  The six pieces are named
KERNAL-I, KERNAL-D, SUPER-I, SUPER-D, USER-I, and USER-D.  INSTRUCTION space
is used for all references used as instruction fetches, index words, absolute
addresses, and immediate operands.   All other references are in DATA space.
	Illegal memory references are aborted before the access is actually
performed, information about the error is stored in internal registers, and
a processor trap to vector location 250 is executed.
MAPPING TABLE DIFFERENCES

	The Panofsky map divides each space (i.e. USER-I) into 64 virtual
address pages of 512 words (1024 bytes).  Each virtual page may be mapped into
an arbitrary physical page.  Virtual and Physical pages are located only on
512 word boundarys.  Any page may be marked as no access, read only,
write only or read-write.
	The KT11-C divides each space into 8 virtual address pages of 4K words
each.  Each virtual page may be mapped into an arbitrary place in physical memory
beginning on any 32 word boundary.  The size of each page may be reduced from
the full 4K words by any multiple of 32 words, with the restricted piece being
taken from either the top of bottom of the page.
	A page map that is set up for the KT11-C can be converted for use with
the Panofsky map with complete flexibility except that the Panofsky map only
allows 512 word increments of allocation where the KT11-C allows 32 word quanta.
	The KT11-C has separate mapping tables for each of the six spaces.  This
allows a completely unique mapping function to be applied to each of the spaces.
The Panofsky map has only four complete mapping tables.  Each of the six spaces
may be enabled to use any of the four tables.  Additionally, each of the six
spaces has a "maximum page register" which dis-allows references above a specified
virtual address.  Also associated with each space is a bit that causes any accesses
to to be unmapped.  This difference between the two units has the widest ramifications
as it prevents the Panofsky map from having more than four unique mapping functions,
although it does allow different spaces to have different total allowable virtual
size with otherwise the same mapping function.  In most cases this shouldn't be
a problem as usually KERNAL I and D spaces would be unmapped, and USER I and D
space would use the same map.
ACCESS CODES AND STATISTICS MECHANISMS

	The KT11-C allows each page to be marked non-resident, read only,
and read-write.  The Panofsky map may have any page marked by these same
access codes with the addition of write only.  Both units have two bits
per page indicating whether or not that page has been accessed or written
into.  The KT11-C has a feature which is not implemented in the Panofsky
map which causes a trap to occur at the end of an instruction when certain
conditions are satisfied.  This trap can be enabled to occur on a read
from a read only page, a write to a read-write page, or any access to a 
read-write page.
STATUS REGISTERS

	Status register 0 (SR0) in both units provides basic control of the
mapper and indications of error conditions.  The formats of this register
are quite different, but the functions are very similar.
	SR2 in both units indicates the address of the first word of the
instruction that was being executed when an error occured.
	SR1 in the Panofsky map indicates the virtual address of the attempted
access that was aborted on an error.  The KT11-C SR1 gives data to restore
the state of registers modified by a partially completed instruction in case
it is decided to re-try the instruction.  When the Panofsky map is used, it is
possible to recover the incremented/decremented register contents because the
program knows which reference caused the error and therefore how far the
instruction had progressed.
	SR3 in the KT11-C is used to enable the three D spaces.  The Panofsky
map uses the MAP SPACE TABLE for this purpose so it has no SR3.